Focal plane compression 128×128 image sensor based on column parallel architecture

In order to enhance the performance of image sensing, we have been investigating a novel image sensor which compresses image signal on the sensor focal plane. By the integration of sensing and compression, number of pixels in the image signal that has to be readout from the sensor can be significantly reduced, and the integration can consequently increase the pixel rate of the sensor. In this paper, we describe a new prototype sensor based on a column parallel architecture which has 128×128 pixels. We have improved the processing circuits of the new prototype to achieve much lower power dissipation and higher processing speed. We have verified that the processing circuits can be operated at 5000 frames /second.