On sensor image compression based on pixel parallel and column parallel architectures

K. Aizawa, Takayuki Hamamoto, Y. Egi, M. Hatori, H. Maruyama

Research output: Contribution to journalConference articlepeer-review

Abstract

We propose a novel concept of an integration of compression and sensing in order to enhance performance of the image sensor. By integrating compression function on the sensor plane, the image signal that has to be readout from the sensor is significantly reduced. Thus, the integration can consequently increase the pixel rate of the sensor. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. In this paper, we discuss design and implementation of two architectures for on sensor compression. One is pixel parallel approach and the other is column parallel approach. We describe and compare both approaches.

Original languageEnglish
Pages (from-to)179-181
Number of pages3
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
Publication statusPublished - 1 Jan 1996
EventProceedings of the 1996 IEEE International Symposium on Circuits and Systems, ISCAS. Part 1 (of 4) - Atlanta, GA, USA
Duration: 12 May 199615 May 1996

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