Direct conversion digital receivers require precise sample timing in order to synchronize them with the carrier waves of received RF signals. This means a carrier regeneration technique for modulated RF signals is required. Unfortunately, carrier regeneration is considered to be very difficult to apply in the case of 64-QAM signals. To address this problem, we have developed a sampling clock generator composed of Field-programmable Gate Array (FPGA) devices that makes use of three new key clock generation techniques. Experiments conducted on the generator demonstrate the validity of these techniques for synchronous sampling of 16-QAM RF signals.