Insight into the Mechanism of Tail Bits in Data Retention of Vacancy-Modulated Conductive Oxide RRAM

Sang Gyu Koh; Kazuaki Kurihara; Attilio Belmonte; Mihaela Ioana Popovici; Gabriele Luca Donadio; Ludovic Goux; Gouri Sankar Kar

doi:10.1109/LED.2018.2810513

Insight into the Mechanism of Tail Bits in Data Retention of Vacancy-Modulated Conductive Oxide RRAM

Sang Gyu Koh, Kazuaki Kurihara, Attilio Belmonte, Mihaela Ioana Popovici, Gabriele Luca Donadio, Ludovic Goux, Gouri Sankar Kar

Department of Applied Electronics

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

The underlying mechanism causing tail bits in data retention for high resistance state (HRS) of vacancy-modulated conductive oxide resistive RAM, consisting of TiN/amorphous-Si/TiO₂/TiN structure, was investigated. The tail bits observed in the small size cells with large On/Off ratio were attributed to the current fluctuations in time. The mechanism, in which the current fluctuation is caused by the fragility of the conduction path in a high resistive region determining the cell current in TiO₂, was clarified by retention measurement with various conditions of On/Off ratio and cell size. It was found that the total number of defects in the high resistive region is the key to ensure a steady HRS conduction. We, furthermore, demonstrated a way to suppress the tail bits in the small size cells nm²) even with large On/Off ratio by process tuning of TiO₂ film fabrication.

Original language	English
Pages (from-to)	480-483
Number of pages	4
Journal	IEEE Electron Device Letters
Volume	39
Issue number	4
DOIs	https://doi.org/10.1109/LED.2018.2810513
Publication status	Published - Apr 2018

Keywords

RRAM
TiO
data retention
non-filamentary resistive switching
tail bits

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title = "Insight into the Mechanism of Tail Bits in Data Retention of Vacancy-Modulated Conductive Oxide RRAM",

abstract = "The underlying mechanism causing tail bits in data retention for high resistance state (HRS) of vacancy-modulated conductive oxide resistive RAM, consisting of TiN/amorphous-Si/TiO2/TiN structure, was investigated. The tail bits observed in the small size cells with large On/Off ratio were attributed to the current fluctuations in time. The mechanism, in which the current fluctuation is caused by the fragility of the conduction path in a high resistive region determining the cell current in TiO2, was clarified by retention measurement with various conditions of On/Off ratio and cell size. It was found that the total number of defects in the high resistive region is the key to ensure a steady HRS conduction. We, furthermore, demonstrated a way to suppress the tail bits in the small size cells nm2) even with large On/Off ratio by process tuning of TiO2 film fabrication.",

keywords = "RRAM, TiO, data retention, non-filamentary resistive switching, tail bits",

author = "Koh, {Sang Gyu} and Kazuaki Kurihara and Attilio Belmonte and Popovici, {Mihaela Ioana} and Donadio, {Gabriele Luca} and Ludovic Goux and Kar, {Gouri Sankar}",

note = "Funding Information: Manuscript received January 23, 2018; revised February 21, 2018; accepted February 25, 2018. Date of publication February 28, 2018; date of current version March 22, 2018. This work was supported by imec{\textquoteright}s core partner industrial affiliation program on emerging memory. The review of this letter was arranged by Editor D. Ha. (Corresponding author: Sang-Gyu Koh.) S.-G. Koh and K. Kurihara are with Toshiba Memory Corporation assigned at imec, 3001 Leuven, Belgium (e-mail: sanggyu1.koh@ toshiba.co.jp). Publisher Copyright: {\textcopyright} 1980-2012 IEEE.",

year = "2018",

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doi = "10.1109/LED.2018.2810513",

language = "English",

volume = "39",

pages = "480--483",

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AU - Popovici, Mihaela Ioana

AU - Donadio, Gabriele Luca

AU - Goux, Ludovic

AU - Kar, Gouri Sankar

N1 - Funding Information: Manuscript received January 23, 2018; revised February 21, 2018; accepted February 25, 2018. Date of publication February 28, 2018; date of current version March 22, 2018. This work was supported by imec’s core partner industrial affiliation program on emerging memory. The review of this letter was arranged by Editor D. Ha. (Corresponding author: Sang-Gyu Koh.) S.-G. Koh and K. Kurihara are with Toshiba Memory Corporation assigned at imec, 3001 Leuven, Belgium (e-mail: sanggyu1.koh@ toshiba.co.jp). Publisher Copyright: © 1980-2012 IEEE.

PY - 2018/4

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N2 - The underlying mechanism causing tail bits in data retention for high resistance state (HRS) of vacancy-modulated conductive oxide resistive RAM, consisting of TiN/amorphous-Si/TiO2/TiN structure, was investigated. The tail bits observed in the small size cells with large On/Off ratio were attributed to the current fluctuations in time. The mechanism, in which the current fluctuation is caused by the fragility of the conduction path in a high resistive region determining the cell current in TiO2, was clarified by retention measurement with various conditions of On/Off ratio and cell size. It was found that the total number of defects in the high resistive region is the key to ensure a steady HRS conduction. We, furthermore, demonstrated a way to suppress the tail bits in the small size cells nm2) even with large On/Off ratio by process tuning of TiO2 film fabrication.

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Insight into the Mechanism of Tail Bits in Data Retention of Vacancy-Modulated Conductive Oxide RRAM

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