Comparison between multipath interference canceller and chip equalizer in HSDPA in multipath channel

Teruo Kawamura, Kenichi Higuchi, Yoshihisa Kishiyama, Mamoru Sawahashi

Research output: Contribution to journalConference article

23 Citations (Scopus)


This paper compares by computer simulation the throughput performance of a multipath interference canceller (MPIC) and that of a sliding-window chip equalizer (SWCE) in high-speed downlink packet access (HSDPA) in a multipath fading channel. We also propose new MPIC and SWCE configurations that suppress not only multipath interference (MPI) of the Downlink Shared Channel (DSCH) in its own cell but also the multiuser interference (MUI) of the DSCH from a neighboring interference-dominant cell. Computer simulation results elucidate that when the MPIC or the SWCE which suppresses the MPI of the DSCH in only its own cell is employed, the MPIC achieves throughput greater than that of the SWCE ranging from a lower (i.e., the lower average received Eb/N0) to a higher throughput such as 4.8 Mbps, which is achieved by the modulation and coding scheme (MCS) of 16QAM with coding rate R = 1/2. In an even higher throughput region, achieved using the MCS of 16QAM with R = 3/4, the SWCE exhibits superiority over MPIC. Furthermore, we also clarify that when the MPIC and the SWCE with neighboring-cell MUI suppression, the SWCE achieves better throughput compared to the MPIC.

Original languageEnglish
Pages (from-to)459-463
Number of pages5
JournalIEEE Vehicular Technology Conference
Publication statusPublished - 1 Jan 2002
Event55th Vehicular Technology Conference - Birmingham, AL, United States
Duration: 6 May 20029 May 2002


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