A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler

Keisuke Kawahara; Joe Sawada; Takumi Kamo; Yohtaro Umeda; Kyoya Takano

doi:10.1109/RWS53089.2022.9719979

A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler

Keisuke Kawahara, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano

Department of Electrical Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents a CMOS analog multiplexer for a DAC bandwidth tripler. The bandwidth tripler extends the bandwidth of the DACs three times without generating image signals. We revealed the effect of the non-linearity of the AMUX in the bandwidth tripler, and pseudo differential switches were used to reduce the distortions. To compensate for the limited performance of CMOS devices, a broadband matching circuit was inserted into the output of the AMUX. Post-layout simulation results demonstrated a 50 Gbps PAM4 signal generation with a small power consumption of 49 mW. The power efficiency of the AMUX is only 0.98 pJ/bit, which is superior to the previous work.

Original language	English
Title of host publication	2022 IEEE Radio and Wireless Symposium, RWS 2022
Publisher	IEEE Computer Society
Pages	125-127
Number of pages	3
ISBN (Electronic)	9781665434621
DOIs	https://doi.org/10.1109/RWS53089.2022.9719979
Publication status	Published - 2022
Event	2022 IEEE Radio and Wireless Symposium, RWS 2022 - Las Vegas, United States Duration: 16 Jan 2022 → 19 Jan 2022

Publication series

Name	IEEE Radio and Wireless Symposium, RWS
Volume	2022-January
ISSN (Print)	2164-2958
ISSN (Electronic)	2164-2974

Conference

Conference	2022 IEEE Radio and Wireless Symposium, RWS 2022
Country/Territory	United States
City	Las Vegas
Period	16/01/22 → 19/01/22

Keywords

AMUXes
Analog multiplexers
CMOS integrated circuits
digital-analog conversion
fiber-optic communications

Access to Document

10.1109/RWS53089.2022.9719979

Cite this

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title = "A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler",

abstract = "This paper presents a CMOS analog multiplexer for a DAC bandwidth tripler. The bandwidth tripler extends the bandwidth of the DACs three times without generating image signals. We revealed the effect of the non-linearity of the AMUX in the bandwidth tripler, and pseudo differential switches were used to reduce the distortions. To compensate for the limited performance of CMOS devices, a broadband matching circuit was inserted into the output of the AMUX. Post-layout simulation results demonstrated a 50 Gbps PAM4 signal generation with a small power consumption of 49 mW. The power efficiency of the AMUX is only 0.98 pJ/bit, which is superior to the previous work.",

keywords = "AMUXes, Analog multiplexers, CMOS integrated circuits, digital-analog conversion, fiber-optic communications",

author = "Keisuke Kawahara and Joe Sawada and Takumi Kamo and Yohtaro Umeda and Kyoya Takano",

note = "Publisher Copyright: {\textcopyright} 2022 IEEE.; 2022 IEEE Radio and Wireless Symposium, RWS 2022 ; Conference date: 16-01-2022 Through 19-01-2022",

year = "2022",

doi = "10.1109/RWS53089.2022.9719979",

language = "English",

series = "IEEE Radio and Wireless Symposium, RWS",

publisher = "IEEE Computer Society",

pages = "125--127",

booktitle = "2022 IEEE Radio and Wireless Symposium, RWS 2022",

}

Kawahara, K, Sawada, J, Kamo, T, Umeda, Y & Takano, K 2022, A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler. in 2022 IEEE Radio and Wireless Symposium, RWS 2022. IEEE Radio and Wireless Symposium, RWS, vol. 2022-January, IEEE Computer Society, pp. 125-127, 2022 IEEE Radio and Wireless Symposium, RWS 2022, Las Vegas, United States, 16/01/22. https://doi.org/10.1109/RWS53089.2022.9719979

A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler. / Kawahara, Keisuke; Sawada, Joe; Kamo, Takumi; Umeda, Yohtaro; Takano, Kyoya.

2022 IEEE Radio and Wireless Symposium, RWS 2022. IEEE Computer Society, 2022. p. 125-127 (IEEE Radio and Wireless Symposium, RWS; Vol. 2022-January).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - This paper presents a CMOS analog multiplexer for a DAC bandwidth tripler. The bandwidth tripler extends the bandwidth of the DACs three times without generating image signals. We revealed the effect of the non-linearity of the AMUX in the bandwidth tripler, and pseudo differential switches were used to reduce the distortions. To compensate for the limited performance of CMOS devices, a broadband matching circuit was inserted into the output of the AMUX. Post-layout simulation results demonstrated a 50 Gbps PAM4 signal generation with a small power consumption of 49 mW. The power efficiency of the AMUX is only 0.98 pJ/bit, which is superior to the previous work.

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A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler

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