A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler

Keisuke Kawahara, Joe Sawada, Takumi Kamo, Yohtaro Umeda, Kyoya Takano

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper presents a CMOS analog multiplexer for a DAC bandwidth tripler. The bandwidth tripler extends the bandwidth of the DACs three times without generating image signals. We revealed the effect of the non-linearity of the AMUX in the bandwidth tripler, and pseudo differential switches were used to reduce the distortions. To compensate for the limited performance of CMOS devices, a broadband matching circuit was inserted into the output of the AMUX. Post-layout simulation results demonstrated a 50 Gbps PAM4 signal generation with a small power consumption of 49 mW. The power efficiency of the AMUX is only 0.98 pJ/bit, which is superior to the previous work.

Original languageEnglish
Title of host publication2022 IEEE Radio and Wireless Symposium, RWS 2022
PublisherIEEE Computer Society
Pages125-127
Number of pages3
ISBN (Electronic)9781665434621
DOIs
Publication statusPublished - 2022
Event2022 IEEE Radio and Wireless Symposium, RWS 2022 - Las Vegas, United States
Duration: 16 Jan 202219 Jan 2022

Publication series

NameIEEE Radio and Wireless Symposium, RWS
Volume2022-January
ISSN (Print)2164-2958
ISSN (Electronic)2164-2974

Conference

Conference2022 IEEE Radio and Wireless Symposium, RWS 2022
Country/TerritoryUnited States
CityLas Vegas
Period16/01/2219/01/22

Keywords

  • AMUXes
  • Analog multiplexers
  • CMOS integrated circuits
  • digital-analog conversion
  • fiber-optic communications

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